Typically in FES applications, current stimulators are used for providing programmable current pulses directed through an electrode to stimulate targeted neuromuscular tissue. The amplitude and duration of the current pulses delivered through the electrode are usually programmed through a digital to analog converter (DAC). The current output from the DAC is normally amplified to the desired output current amplitude at the current stimulator. The current amplification is typically accomplished using a current mirror circuit and in particular for MOSFET devices, the current gain is achieved by controlling the device semiconductor die width (W) to length (L) ratio (W/L) of the input side and output side transistors of a current mirror. For example, in the prior art current mirror circuit of FIG. 1, the W/L ratios of the input side transistor M1 and the output side transistor M2 determine the overall current gain.
Errors regarding the amplitudes of the current delivered arise mainly due to the finite output impedance of the stimulator and any mismatch errors between the input side transistor M1 and the output side transistor M2. One technique to compensate for the effects of the output impedance of the stimulator is to configure the circuit of FIG. 1 to include transistors MC1 and MC2 in a cascode arrangement in order to increase the output impedance of the stimulator. Typically, to compensate for the mismatch in the input side and output side transistors, the W's and/or L's of the transistors are usually increased. The negative effect however of increasing the device W and L is a marked slow down of the response time of stimulator between turn on to turn off and vice versa by virtue of increased transistor capacitances. This slow down is particularly realized when the stimulator current is programmed for low current amplitudes.
In advanced applications it is contemplated that stimulator output current is to be individually and independently programmed through a plurality of electrodes rather than through just a single electrode. For a candidate circuit as is shown in FIG. 2A, it is contemplated that the cascode transistor may be split into a number of cascode transistors, that is transistors MC(2) to MC(n), supplying output current to respective “loads” and that the overall output current equals the input DAC current times a current gain K. The number of outputs OUT(2) to OUT(n) delivering output current is controllable by switching the gates of the individual cascode transistors to voltage source VBP for turning on a particular transistor and to VS for turning off the particular transistor. In such cases it is likely that individual output currents as well as the overall sum of individual output currents, will vary as a function of different electrode/tissue impedances and the voltages at each of the outputs.
As shown in FIG. 2B, one technique to reduce these variations is to use differential amplifiers or operational amplifiers (op amps) in an attempt to regulate stimulator operation. In such case, one input to the op amp 20 designated as A is the common interconnection of the drains of the cascode transistors MC(2) to MC(n) while another input to the op amp 20 designated as B is a predetermined reference voltage. In operation, the regulated design of FIG. 2B strives to maintain the voltage at input A equal to the voltage at input B for a constant current ID2 flowing through transistor M2 independent of the number of outputs being turned on or off. However this approach could be compromised due to the different loading capacitances and loads coupled to op amp 20 when a different number of electrodes are programmed for current/stimulation delivery. Additionally, long turn on and turn off times are expected especially when relatively small currents are programmed and a large number of electrodes are activated. The situation is compounded especially when using high voltage transistors for the cascode transistors to accommodate high voltages at the outputs. The high voltage transistors usually have high threshold voltages and it normally requires a long time to charge up to the threshold voltage before the transistors turn on. In some instances, what is needed may be a circuit design to improve the output current accuracy for multiple electrode applications without the requirements of continual calibration and a design with less transistor die area. In establishing a current gain K, it may be desirable in at least some instances to avoid dependence on transistor die size to establish the gain and on a more reliable parameter such as resistors.
Furthermore, a design may be helpful in some instances to ensure fast turn on time under different output current levels including small output current delivery conditions especially with a multiplicity of programmable stimulating electrodes that are capable of outputting large current levels. However, in many stimulator designs, the turn on times for delivering small output current levels are usually very long. This is mainly due to the fact that only small currents are available to flow through the transistors for small output current levels to charge the parasitic capacitances of the transistors, especially the gate-to-source capacitances. The turn on times are even longer, especially for high voltage stimulators that can be programmed to have large current outputs. For these high voltage stimulators, very large high voltage transistors are required for the required large output current levels due to the relatively low gain of these transistors. Also, due to the relatively high threshold voltages associated with these high voltage transistors, it will take longer time to have the small current outputs charging up the gate-to-source voltages to higher than the threshold voltages in order to turn on these high voltage transistors.